The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed.
It has been observed that conventional photoresist stripping solutions may exhibit one or more disadvantages. For example, dry etching plasma removal methods and aqueous based stripping solutions may cause damage to the underlying substrate or patterning layer. The damaged layer may then exhibit poor electric performance, poor yield, and high cost of ownership. Traditional organic stripping solutions may leave small portions of photoresist material behind, which can result in deformities in subsequently deposited layers. Accordingly, what is needed is a method and photoresist stripping solution for manufacturing an integrated circuit device that addresses these issues.